GaN devices are expected to be widely adopted for power switches as production costs are reduced, for example, by fabrication of lateral GaN transistors on lower cost silicon substrates (GaN-on-Si die). Lateral GaN power transistors offer low on-resistance Ron and high current capability per unit active area of the device.
To benefit from the inherent performance characteristics of lateral GaN transistors, important design considerations include, for example, device layout (topology), low inductance packaging, and effective thermal management.
The substrate material on which a GaN transistor is fabricated can significantly affect the breakdown voltage and thermal dissipation. GaN devices are typically fabricated by hetero-epitaxial growth, that is, a stack of GaN epitaxial layers (GaN epi-layer stack) is grown on a growth substrate other than GaN, typically silicon carbide (SiC) or silicon (Si).
For example, lateral GaN High Electron Mobility Transistors (HEMTs) comprise a heterolayer structure comprising a layer of GaN and an overlying layer of Aluminum Gallium Nitride (AlGaN). The GaN/AlGaN heterostructure provides a 2 Dimensional Electron Gas (2DEG) active layer. The GaN semiconductor layers are epitaxially grown on the underlying native silicon substrate (“growth substrate”). Since there is a lattice mismatch between the GaN semiconductor layers and the silicon surface, the stack of epitaxial layers (epi-layer stack) typically comprises one or more intermediate layers or buffer layers underlying the GaN/AlGaN heterostructure layers.
Significant research has been directed to methods for fabrication of GaN devices by epitaxial growth on a range of growth substrates. It is also known to grow the GaN epi-layer stack on a sacrificial low cost substrate, such as a large diameter silicon wafer, and then use substrate removal and epitaxial transfer of the GaN device structure to an alternative substrate layer.
For further background information on fabrication of GaN transistors and GaN optoelectronic devices, reference is made, by way of example, to the following:                (1) “Fast, Efficient Switching—Thanks to HiPoSwitch”, PhysOrg, 15 Apr. 2015;        (2) R. Matheson, “Making the New Silicon: Gallium Nitride Electronics Could Drastically Cut Energy Usage”, PhysOrg, 29 Jul. 2015;        (3) “Panasonic Develops a Gallium Nitride (GaN) Power Transistor with Ultra High Breakdown Voltage over 10000V”, PhysOrg, 13 Dec. 2007;        (4) “New Method Joins Gallium Nitride and Diamond for Better Thermal Management”, PhysOrg, 1 May 2013;        (5) P. C. Chao et al., “A new high power GaN-on-Diamond HEMT with low-temperature bonded substrate technology”, CS MANTECH Conference, May 13th to 16th, 2013, New Orleans, La., USA;        (6) Bin Lu, Daniel Piedra, and Tomas Palacios, “GaN Power Electronics”, 8th International Conference on Advanced Semiconductor Devices & Microsystems (ASDAM), 2010, pp. 105-110;        (7) Bin Lu and Tomas Palacios, “High Breakdown (>1500 V) AlGaN/GaN HEMTs by Substrate-Transfer Technology”, IEEE Electron Device Letters, Vol. 31, No. 9, 2010, pp. 951-953;        (8) Mike Cooke, “Combining Low On-Resistance with High Breakdown Voltage”, Semiconductor Today Compound & Advanced Silicon, Vol. 9, Issue 3, April/May 2014, pp. 92-93;        (9) N. Herbecq et al., “Above 2000 V breakdown voltage on ultrathin barrier AL/GaN-on-Silicon transistors, CS MANTECH Conference, May 18th-21st, 2015, Scottsdale, Ariz., USA, pp. 305-307;        (10) J. W. Chung et al., “Fabrication Technique for Gallium Nitride Substrates”, U.S. Pat. No. 8,703,623 B2, Apr. 22, 2014;        (11) J. W. Chung, et al., “GaN-on-Si Technology, a New Approach for Advanced Devices in Energy and Communications”, Proceedings of the European Solid-State Device Research Conference (ESSDERC), 2010, pp. 52-56;        (12) J. W. Chung, E. Piner, and T. Palacios, “N-face GaN/AlGaN Transistors Through Substrate Removal”, IEEE, 978-1-4244-1 942-5, 2008, pp.199-200;        (13) T. Paskova, D. A. Hanser and K. R. Evans, “GaN Substrates for III-Nitride Devices”, Proceedings of the IEEE, (98), 7, 2010, pp. 1324-1338;        (14) C. R. Miskys et al., “Freestanding GaN-substrates and devices”, Phys. Stat. Sol. (c) 0, No. 6, 2003, pp. 1627-1650;        (15) Holder et al., “Method for the Reuse of Gallium Nitride Epitaxial Substrates”, U.S. Pat. No. 8,866,149 B2, Oct. 21, 2014; and        (16) J. Cho et al., “Thermal Characterization of Composite GaN Substrates”, IEEE Electron Device Letters, Vol. 33, No. 3, March 2012, pp. 378-380.        
It has been reported that fabrication of GaN epi-layers on a silicon substrate offers a ten-fold reduction in fabrication costs relative to fabrication of GaN devices on SiC substrates(1), (2). Silicon substrates are well characterized and available as large diameter wafers (e.g. 8 inches or more), at low cost. However, a known issue with GaN-on-Si devices, e.g. a GaN HEMT fabricated as a GaN/AlGaN epi-layer stack on a silicon substrate, is that the maximum breakdown voltage is limited by the silicon substrate, and is typically less than 400V. Another drawback is poorer thermal dissipation of Si substrates relative to SiC substrates.
A GaN device fabricated on a highly resistive sapphire substrate has been reported to provide an ultra-high breakdown voltage over 10,000V(3). However, sapphire substrates have other drawbacks relative to silicon substrates, including, high cost, limited available wafer size and poor thermal conductivity.
Thus, for fabrication of GaN devices on conventional silicon substrates, several methods have been reported to improve the device breakdown voltage beyond 800V, including:                increasing the thickness of the GaN epitaxial-layers, e.g. use of a 6 μm rather than 2 μm epi-layer stack(7);        providing a buffer layer doped with iron (Fe) or carbon (C)(7);        using AlGaN based buffer layers(7);        use of Schottky-drain contacts(6);        localized removal of the substrate for improved breakdown voltage(8), (9).        
Another approach is to use substrate removal and epitaxial transfer. A GaN epi-layer structure is grown on a low cost silicon substrate; a carrier wafer is attached to the top surface, e.g. by a wafer bonding technique; the underlying silicon growth substrate is removed entirely; and then the GaN epi-layer structure is bonded to another substrate or submount.
For example, an improvement in breakdown voltage can be achieved by epitaxial transfer to an electrically isolating substrate, such as sapphire or glass(7). However, these substrates have poorer thermal conductivity than silicon or silicon carbide. While they improve breakdown voltage, lack of thermal dissipation leads to high operational temperatures, which adversely affects device performance, and/or causes early device failure.
It is well known that synthetic diamond substrates have high thermal conductivity, e.g. up to ˜2000 W/m·K, significantly greater than that of sapphire, silicon or silicon carbide substrates. Substrate removal and epi-layer transfer to a diamond substrate or localized substrate removal and provision of diamond filled thermal vias in a silicon carbide substrate has been reported(4), (5). However, as taught by Chao(5), bonding of a GaN epi-layer structure to a diamond substrate requires specialized processing, and there is a significant mismatch of the Coefficient of Thermal Expansion (CTE) between GaN and diamond.
The above-mentioned cost benefits of fabrication of GaN devices on low cost silicon substrates are, at least in part, due the availability of low cost, large diameter silicon wafers, i.e., 8 inch diameter or more. Thus, the use of silicon growth substrates for GaN devices provides economies of scale as well as compatibility with established wafer processing technologies. Alternative growth substrates, and alternative substrates for epitaxial transfer, such as diamond or sapphire, are currently available only as smaller diameter wafers, and require more costly processing and wafer bonding. These substrates result in significantly higher fabrication costs per unit area compared to silicon substrates.
Thus, there is a need for alternative nitride semiconductor device structures and methods of fabrication of nitride power semiconductor devices, such as GaN power transistors and systems comprising one or more lateral GaN power transistors, which address the above mentioned problems and provide for improved vertical breakdown and effective thermal dissipation.
An object of the present invention is to provide a device structure and a method of fabrication for GaN power devices, such as GaN/AlGaN HEMTs, which is compatible with conventional epitaxial growth of GaN epi-layers on low cost silicon substrates, and which provides for improved breakdown voltage as well as effective thermal dissipation.